256 Processor 10 GIPS Real-Time Vision System
NEC IMAP-VISION and Renesas IMAPCAR2 are members of a family of parallel data processors. They are both designed for computations seen in computer vision such as edge detection, and has specialized instructions and on-chip interconnect for such tasks.
NEC IMAP-VISION was designed and produced before the business unit was spun off from NEC. The paper describing the design of the processor is published in 1996 [1].
Renesas IMAPCAR2 [2] is built on the same concept, but this time they targeted car as their application. Marketing material says the processor is used for collision avoidance system on cars, and with their specialized architecture the latency for processing a frame is lower than conventional embedded microprocessors.
Our IMAP-VISION system is hosted on a VME board with two PLD,
analog video input circuit, and eight processor chips.
256 Processor 10 GIPS Real-Time Vision System
The IMAP-VISION board is controlled by a FORCE CPU-5V VME single-board
system with 110 MHz microSPARC II processor.
This configuration is similar to that of a SPARCstation 5.
We have a evaluation board with a engineering sample IMAPCAR2 chip.
Please note this is a preproduction system we luckily got, so it can differ
from chips that are sold now.
